Linaro GCC 4.5-2010.08-1

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Project:
Linaro GCC
Series:
4.5
Version:
4.5-2010.08-1
Released:
 
Registrant:
Michael Hope
Release registered:
Active:
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2 Andrew Stubbs, 2 Chung-Lin Tang, 2 Ulrich Weigand, 2 Yao Qi
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Release notes 

This is the first release of the Linaro GCC 4.5 series.

Notable features include:
   * Based on GCC 4.5.1
   * Includes the CodeSourcery derived performance improvements from the 4.4 series
   * Various minor bug fixes and improvements

Changelog 

View the full changelog

2010-08-10 Andrew Stubbs <email address hidden>

 GCC Linaro 4.5-2010.08-1 released.

 gcc/
 *REVISION: Update.

2010-08-06 Yao Qi <email address hidden>

 LP: #612011
 gcc/
 * config/arm/arm.c (output_move_double): Fix typo generating
 instructions ('ldr'->'str').

 gcc/testsuite/
 * gcc.target/arm/pr45094.c: New test.

2010-08-02 Ulrich Weigand <email address hidden>

 LP: #604874
 Backport from mainline:

 gcc/cp/
 PR c++/45112
 * decl.c (duplicate_decls): Merge DECL_USER_ALIGN and DECL_PACKED.

 gcc/testsuite/
 PR c++/45112
 * testsuite/g++.dg/pr45112.C: New test.

2010-08-10 Andrew Stubbs <email address hidden>

 Merge from FSF GCC 4.5.1.

2010-08-06 Andrew Stubbs <email address hidden>

 gcc/
 * REVISION: Bump version.

2010-08-06 Andrew Stubbs <email address hidden>

 GCC Linaro 4.5-2010.08-0 released.

 gcc/
 * REVISION: New file.
 * DEV-PHASE: Set to "Linaro".

2010-07-26 Julian Brown <email address hidden>

 Backport from FSF mainline:

 Mark Shinwell <email address hidden>
 Julian Brown <email address hidden>

 gcc/
 * config/arm/thumb2.md (thumb2_movsi_insn): Split ldr and str
 alternatives according to use of high and low regs.
 * config/arm/vfp.md (thumb2_movsi_vfp): Likewise.
 * config/arm/arm.h (CONDITIONAL_REGISTER_USAGE): Use high regs when
 optimizing for size on Thumb-2.

2010-07-26 Julian Brown <email address hidden>

 Merge from Sourcery G++ 4.4:

 http://gcc.gnu.org/ml/gcc-patches/2006-03/msg00038.html

 * g++.dg/other/armv7m-1.C: New.

2010-07-26 Julian Brown <email address hidden>

 Merge from Sourcery G++ 4.4:

 http://gcc.gnu.org/ml/gcc-patches/2006-04/msg00811.html

 Kazu Hirata <email address hidden>

 gcc/testsuite/
 * gcc.target/arm/vfp-ldmdbd.c, gcc.target/arm/vfp-ldmdbs.c,
 gcc.target/arm/vfp-ldmiad.c, gcc.target/arm/vfp-ldmias.c,
 gcc.target/arm/vfp-stmdbd.c, gcc.target/arm/vfp-stmdbs.c,
 gcc.target/arm/vfp-stmiad.c, gcc.target/arm/vfp-stmias.c: New.

2010-07-26 Julian Brown <email address hidden>

 Merge from Sourcery G++ 4.4:

 Julian Brown <email address hidden>
 Mark Shinwell <email address hidden>

 gcc/
 * regrename.c (addresses.h): Move include of addresses.h after
 include of flags.h.
 * recog.c: Likewise.
 * regcprop.c: Likewise.
 * config/arm/arm.h (CLASS_LIKELY_SPILLED_P): Check against
 LO_REGS only for Thumb-1.
 (MODE_BASE_REG_CLASS): Restrict base registers to those which can
 be used in short instructions when optimising for size on Thumb-2.

2010-07-26 Julian Brown <email address hidden>

 Merge from Sourcery G++ 4.4:

 Vladimir Prus <email address hidden>
 Julian Brown <email address hidden>

 gcc/
 * config/arm/arm.c (arm_override_options): Warn if mlow-irq-latency is
 specified in Thumb mode.
 (load_multiple_sequence): Return 0 if low irq latency is requested.
 (store_multiple_sequence): Likewise.
 (arm_gen_load_multiple): Load registers one-by-one if low irq latency
 is requested.
 (arm_gen_store_multiple): Likewise.
 (vfp_output_fldmd): When low_irq_latency is non zero, pop each
 register separately.
 (vfp_emit_fstmd): When low_irq_latency is non zero, save each register
 separately.
 (arm_get_vfp_saved_size): Adjust saved register size calculation for
 the above changes.
 (print_pop_reg_by_ldr): New.
 (arm_output_epilogue): Use print_pop_reg_by_ldr when low irq latency
 is requested.
 (emit_multi_reg_push): Push registers separately if low irq latency
 is requested.
 * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Set __low_irq_latency__.
 (low_irq_latency): Define.
 (USE_RETURN_INSN): Don't use return insn when low irq latency is
 requested.
 * config/arm/lib1funcs.asm (do_pop, do_push): Define as variadic
 macros. When __low_irq_latency__ is defined, push and pop registers
 individually.
 (div0): Use correct punctuation.
 * config/arm/ieee754-df.S: Adjust syntax of using do_push.
 * config/arm/ieee754-sf.S: Likewise.
 * config/arm/bpabi.S: Likewise.
 * config/arm/arm.opt (mlow-irq-latency): New option.
 * config/arm/predicates.md (load_multiple_operation): Return false is
 low irq latency is requested.
 (store_multiple_operation): Likewise.
 * config/arm/arm.md (movmemqi): Don't use it if low irq latency is
 requested.
 * doc/invoke.texi (-mlow-irq-latency): Add documentation.

2010-07-26 Julian Brown <email address hidden>

 Merge from Sourcery G++ 4.4:

 2007-06-06 Joseph Myers <email address hidden>

 gcc/
 * config/arm/arm.h (VALID_IWMMXT_REG_MODE): Allow SImode.
 (ARM_LEGITIMIZE_RELOAD_ADDRESS): Reduce range allowed for SImode
 offsets with iWMMXt.
 * config/arm/arm.c (arm_hard_regno_mode_ok): Update for change to
 VALID_IWMMXT_REG_MODE.

2010-07-26 Julian Brown <email address hidden>

 Merge from Sourcery G++ 4.4:

 2007-07-05 Mark Shinwell <email address hidden>

 gcc/
 * config/arm/arm.h (BRANCH_COST): Set to 1 when optimizing for size
 on Thumb-2.

2010-08-05 Andrew Stubbs <email address hidden>

 gcc/testsuite/
 * gcc.dg/vect/vect-shift-2.c: Revert all previous changes.
 * gcc.dg/vect/vect-shift-4.c: New file.

 2010-07-20 Yao Qi <email address hidden>

 Merge from Sourcery G++ 4.4:
 2009-06-16 Daniel Jacobowitz <email address hidden>

 Merge from Sourcery G++ 4.3:
 2008-12-03 Daniel Jacobowitz <email address hidden>

 gcc/testsuite/
 * gcc.dg/vect/vect-shift-2.c, gcc.dg/vect/vect-shift-3.c: New.
 * lib/target-supports.exp (check_effective_target_vect_shift_char): New
 function.

2010-07-24 Sandra Loosemore <email address hidden>

 Backport from mainline:

 2010-04-10 Wei Guozhi <email address hidden>

 PR target/42601
 gcc/
 * config/arm/arm.c (arm_pic_static_addr): New function.
 (legitimize_pic_address): Call arm_pic_static_addr when it detects
 a static symbol.
 (arm_output_addr_const_extra): Output expression for new pattern.
 * config/arm/arm.md (UNSPEC_SYMBOL_OFFSET): New unspec symbol.

 2010-07-22 Sandra Loosemore <email address hidden>

 PR tree-optimization/39839
 gcc/testsuite/
 * gcc.target/arm/pr39839.c: New test case.

2010-07-24 Jie Zhang <email address hidden>

 Issue #9079

 Backport from mainline:

 gcc/
 2010-07-23 Jie Zhang <email address hidden>
 PR target/44290
 * attribs.c (decl_attributes): Insert "noinline" and "noclone"
 if "naked".
 * tree-sra.c (ipa_sra_preliminary_function_checks): Return
 false if ! tree_versionable_function_p.

 gcc/testsuite/
 2010-07-23 Jie Zhang <email address hidden>
 PR target/44290
 * gcc.dg/pr44290-1.c: New test.
 * gcc.dg/pr44290-2.c: New test.

2010-07-22 Maxim Kuvyrkov <email address hidden>

 Backport from FSF GCC 4.5 branch to fix PR45015:

 2010-07-22 Jakub Jelinek <email address hidden>
 PR debug/45015
 * var-tracking.c (adjust_mems): Ignore ASM_OPERANDS with non-zero
 ASM_OPERANDS_OUTPUT_IDX.
 (adjust_insn): For inline asm with multiple sets ensure first
 ASM_OPERANDS vectors are used by all following ASM_OPERANDS in
 the insn.

 2010-07-22 Jakub Jelinek <email address hidden>
 PR debug/45015
 * gcc.target/m68k/pr45015.c: New test.

2010-07-20 Yao Qi <email address hidden>

 Merge from Sourcery G++ 4.4:
 2010-06-07 Kazu Hirata <email address hidden>

 Issue #8535

 Backport from mainline:
 gcc/
 2010-06-07 Kazu Hirata <email address hidden>
 PR rtl-optimization/44404
 * auto-inc-dec.c (find_inc): Use reg_overlap_mentioned_p instead
 of count_occurrences to see if it's safe to modify mem_insn.insn.

 gcc/testsuite/
 2010-06-07 Kazu Hirata <email address hidden>
 PR rtl-optimization/44404
 * gcc.dg/pr44404.c: New.

2010-08-03 Chung-Lin Tang <email address hidden>

 Backport from mainline:

 gcc/
 2010-07-28 Chung-Lin Tang <email address hidden>
 * config/arm/arm.c (arm_pcs_default): Remove static.
 * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Define __ARM_PCS or
 __ARM_PCS_VFP to indicate soft/hard-float calling convention.
 (arm_pcs_default): Declare.

2010-07-16 Jie Zhang <email address hidden>

 Issue #7688

 Backport from mainline:

 gcc/
 2010-07-12 Jie Zhang <email address hidden>
 * postreload.c (reg_symbol_ref[]): New.
 (move2add_use_add2_insn): New.
 (move2add_use_add3_insn): New.
 (reload_cse_move2add): Handle SYMBOL + OFFSET case.
 (move2add_note_store): Likewise.

2010-07-15 Yao Qi <email address hidden>

 Merge from Sourcery G++ 4.4:

 2010-02-25 Maxim Kuvyrkov <email address hidden>

 gcc/
 * tree.c (initializer_zerop): Handle STRING_CST.

2010-07-15 Sandra Loosemore <email address hidden>

 Backport from mainline:

 2010-06-09 Sandra Loosemore <email address hidden>

 gcc/
 * tree-ssa-loop-ivopts.c (adjust_setup_cost): New function.
 (get_computation_cost_at): Use it.
 (determine_use_iv_cost_condition): Likewise.
 (determine_iv_cost): Likewise.

 2010-07-05 Sandra Loosemore <email address hidden>

 PR middle-end/42505

 gcc/
 * tree-ssa-loop-ivopts.c (determine_set_costs): Delete obsolete
 comments about cost model.
 (try_add_cand_for): Add second strategy for choosing initial set
 based on original IVs, controlled by ORIGINALP argument.
 (get_initial_solution): Add ORIGINALP argument.
 (find_optimal_iv_set_1): New function, split from find_optimal_iv_set.
 (find_optimal_iv_set): Try two different strategies for choosing
 the IV set, and return the one with lower cost.

 gcc/testsuite/
 * gcc.target/arm/pr42505.c: New test case.

 2010-07-10 Sandra Loosemore <email address hidden>

 PR middle-end/42505

 gcc/
 * tree-inline.c (estimate_num_insns): Refactor builtin complexity
 lookup code into....
 * builtins.c (is_simple_builtin, is_inexpensive_builtin): ...these
 new functions.
 * tree.h (is_simple_builtin, is_inexpensive_builtin): Declare.
 * cfgloopanal.c (target_clobbered_regs): Define.
 (init_set_costs): Initialize target_clobbered_regs.
 (estimate_reg_pressure_cost): Add call_p argument. When true,
 adjust the number of available registers to exclude the
 call-clobbered registers.
 * cfgloop.h (target_clobbered_regs): Declare.
 (estimate_reg_pressure_cost): Adjust declaration.
 * tree-ssa-loop-ivopts.c (struct ivopts_data): Add body_includes_call.
 (ivopts_global_cost_for_size): Pass it to estimate_reg_pressure_cost.
 (determine_set_costs): Dump target_clobbered_regs.
 (loop_body_includes_call): New function.
 (tree_ssa_iv_optimize_loop): Use it to initialize new field.
 * loop-invariant.c (gain_for_invariant): Adjust arguments to pass
 call_p flag through.
 (best_gain_for_invariant): Likewise.
 (find_invariants_to_move): Likewise.
 (move_single_loop_invariants): Likewise, using already-computed
 has_call field.

2010-07-15 Jie Zhang <email address hidden>

 Issue #8497, #8893

 Backport from mainline (originally from Sourcery G++ 4.4):

 gcc/
 2010-07-12 Jie Zhang <email address hidden>
 * config/arm/arm.c (arm_get_frame_offsets): Don't use r3 to
 align the stack when it's going to be saved.

 gcc/testsuite/
 2010-07-12 Jie Zhang <email address hidden>
 * gcc.target/arm/interrupt-1.c: New test.
 * gcc.target/arm/interrupt-2.c: New test.

2010-07-15 Jie Zhang <email address hidden>

 Backport from mainline (originally from Sourcery G++ 4.4):

 gcc/
 2010-07-07 Jie Zhang <email address hidden>
 * genautomata.c (output_automata_list_min_issue_delay_code):
 Correctly decompress min_issue_delay.

2010-07-15 Jie Zhang <email address hidden>

 Issue #8980

 Backport from mainline (originally from Sourcery G++ 4.4):

 gcc/
 2010-07-03 Jie Zhang <email address hidden>
 * config/arm/vfp.md (*push_multi_vfp): Use vfp_register_operand
 as predicate for operand 1 and remove its constraint.
 * config/arm/predicates.md (vfp_register_operand): New.
 * config/arm/arm.md (*push_multi): Remove the constraint of
 operand 1.
 (*push_fp_multi): Likewise.

2010-07-15 Jie Zhang <email address hidden>

 Backport from mainline (originally from Sourcery G++ 4.4):

 gcc/cp/
 2010-04-07 Jie Zhang <email address hidden>

 PR c++/42556
 * typeck2.c (split_nonconstant_init_1): Drop empty CONSTRUCTOR
 when all of its elements are non-constant and have been split out.

 gcc/testsuite/
 2010-04-07 Jie Zhang <email address hidden>

 PR c++/42556
 * g++.dg/init/pr42556.C: New test.

2010-07-12 Yao Qi <email address hidden>

 Merge from Sourcery G++ 4.4:

 2009-10-06 Paul Brook <email address hidden>
 Issue #3869
 gcc/
 * target.h (gcc_target): Add warn_func_result.
 * target-def.h (TARGET_WARN_FUNC_RESULT): Define and use.
 * tree-cfg.h (execute_warn_function_return): Use
 targetm.warn_func_result.
 * config/arm/arm.c (TARGET_WARN_FUNC_RESULT): Define.
 (arm_warn_func_result): New function.

 gcc/testuite/
  * gcc.target/arm/naked-3.c: New test.

2010-07-10 Sandra Loosemore <email address hidden>

 Backport from mainline:

 2010-05-08 Sandra Loosemore <email address hidden>

 PR middle-end/28685

 gcc/
 * tree-ssa-reassoc.c (eliminate_redundant_comparison): New function.
 (optimize_ops_list): Call it.

 gcc/testsuite/
 * gcc.dg/pr28685-1.c: New file.

 2010-06-08 Sandra Loosemore <email address hidden>

 PR tree-optimization/39874
 PR middle-end/28685

 gcc/
 * gimple.h (maybe_fold_and_comparisons, maybe_fold_or_comparisons):
 Declare.
 * gimple-fold.c (canonicalize_bool, same_bool_comparison_p,
 same_bool_result_p): New.
 (and_var_with_comparison, and_var_with_comparison_1,
 and_comparisons_1, and_comparisons, maybe_fold_and_comparisons): New.
 (or_var_with_comparison, or_var_with_comparison_1,
 or_comparisons_1, or_comparisons, maybe_fold_or_comparisons): New.
 * tree-ssa-reassoc.c (eliminate_redundant_comparison): Use
 maybe_fold_and_comparisons or maybe_fold_or_comparisons instead
 of combine_comparisons.
 * tree-ssa-ifcombine.c (ifcombine_ifandif, ifcombine_iforif): Likewise.

 gcc/testsuite/
 * gcc.dg/pr39874.c: New file.

2010-07-10 Yao Qi <email address hidden>

 Merge from Sourcery G++ 4.4:

 2009-09-02 Daniel Jacobowitz <email address hidden>

 libgcc/
 * shared-object.mk (c_flags-$(base)$(objext)): New.
 ($(base)$(objext)): Use above.
 ($(base)_s$(objext)): Likewise.
 * static-object.mk (c_flags-$(base)$(objext)): New.
 ($(base)$(objext)): Use above.

2010-07-10 Yao Qi <email address hidden>

 Merge from Sourcery G++ 4.4:

 2009-05-28 Julian Brown <email address hidden>

 Merged from Sourcery G++ 4.3:

 libgcc/
 * config.host (arm*-*-linux*, arm*-*-uclinux*, arm*-*-eabi*)
 (arm*-*-symbianelf): Add arm/t-divmod-ef to tmake_file.
 * Makefile.in (LIB2_DIVMOD_EXCEPTION_FLAGS): Set to previous
 default if not set by a target-specific Makefile fragment.
 (lib2-divmod-o, lib2-divmod-s-o): Use above.
 * config/arm/t-divmod-ef: New.

2010-07-09 Sandra Loosemore <email address hidden>

 Merge from Sourcery G++ 4.4:

 2009-05-21 Sandra Loosemore <email address hidden>

 Merge from Sourcery G++ 4.3:

 2009-04-04 Sandra Loosemore <email address hidden>

 Issue #5104
 PR tree-optimization/39604

 gcc/testsuite
 * g++.dg/tree-ssa/sink-1.C: New.

 gcc/
 * tree_ssa-sink.c (sink_code_in_bb): Do not sink statements out
 of a lexical block containing variable definitions.

2010-07-09 Sandra Loosemore <email address hidden>

 Backport from mainline (originally on Sourcery G++ 4.4):

 2010-07-02 Julian Brown <email address hidden>
      Sandra Loosemore <email address hidden>

 PR target/43703

 gcc/
 * config/arm/vec-common.md (add<mode>3, sub<mode>3, smin<mode>3)
 (smax<mode>3): Disable for NEON float modes when
 flag_unsafe_math_optimizations is false.
 * config/arm/neon.md (*add<mode>3_neon, *sub<mode>3_neon)
 (*mul<mode>3_neon)
 (mul<mode>3add<mode>_neon, mul<mode>3neg<mode>add<mode>_neon)
 (reduc_splus_<mode>, reduc_smin_<mode>, reduc_smax_<mode>): Disable
 for NEON float modes when flag_unsafe_math_optimizations is false.
 (quad_halves_<code>v4sf): Only enable if flag_unsafe_math_optimizations
 is true.
 * doc/invoke.texi (ARM Options): Add note about floating point
 vectorization requiring -funsafe-math-optimizations.

 gcc/testsuite/
 * gcc.dg/vect/vect.exp: Add -ffast-math for NEON.
 * gcc.dg/vect/vect-reduc-6.c: Add XFAIL for NEON.

2010-07-08 Sandra Loosemore <email address hidden>

 Backport from upstream (originally from Sourcery G++ 4.4):

 2010-07-02 Daniel Jacobowitz <email address hidden>
      Julian Brown <email address hidden>
      Sandra Loosemore <email address hidden>

 gcc/
 * config/arm/arm.c (arm_canonicalize_comparison): Canonicalize DImode
 comparisons. Adjust to take both operands.
 (arm_select_cc_mode): Handle DImode comparisons.
 (arm_gen_compare_reg): Generate a scratch register for DImode
 comparisons which require one. Use xor for Thumb equality checks.
 (arm_const_double_by_immediates): New.
 (arm_print_operand): Allow 'Q' and 'R' for constants.
 (get_arm_condition_code): Handle new CC_CZmode and CC_NCVmode.
 * config/arm/arm.h (CANONICALIZE_COMPARISON): Always use
 arm_canonicalize_comparison.
 * config/arm/arm-modes.def: Add CC_CZmode and CC_NCVmode.
 * config/arm/arm-protos.h (arm_canonicalize_comparison): Update
 prototype.
 (arm_const_double_by_immediates): Declare.
 * config/arm/constraints.md (Di): New constraint.
 * config/arm/predicates.md (arm_immediate_di_operand)
 (arm_di_operand, cmpdi_operand): New.
 * config/arm/arm.md (cbranchdi4): Handle non-Cirrus also.
 (*arm_cmpdi_insn, *arm_cmpdi_unsigned)
 (*arm_cmpdi_zero, *thumb_cmpdi_zero): New insns.
 (cstoredi4): Handle non-Cirrus also.

 gcc/testsuite/
 * gcc.c-torture/execute/20100416-1.c: New test case.

2010-07-08 Sandra Loosemore <email address hidden>

 Backport from upstream (originally from Sourcery G++ 4.4):

 2010-07-02 Sandra Loosemore <email address hidden>

 gcc/
 * config/arm/neon.md (vec_extractv2di): Correct error in register
 numbering to reconcile with neon_vget_lanev2di.

 2010-07-02 Sandra Loosemore <email address hidden>

 gcc/
 * config/arm/arm.c (neon_vdup_constant): Expand into canonical RTL
 instead of an unspec.
 (neon_expand_vector_init): Likewise.
 * config/arm/neon.md (UNSPEC_VCOMBINE): Delete.
 (UNSPEC_VDUP_LANE): Delete.
 (UNSPEC VDUP_N): Delete.
 (UNSPEC_VGET_HIGH): Delete.
 (UNSPEC_VGET_LANE): Delete.
 (UNSPEC_VGET_LOW): Delete.
 (UNSPEC_VMVN): Delete.
 (UNSPEC_VSET_LANE): Delete.
 (V_double_vector_mode): New.
 (vec_set<mode>_internal): Make code emitted match that for the
 corresponding intrinsics.
 (vec_setv2di_internal): Likewise.
 (neon_vget_lanedi): Rewrite to expand into emit_move_insn.
 (neon_vget_lanev2di): Rewrite to expand into vec_extractv2di.
 (neon_vset_lane<mode>): Combine double and quad patterns and
 expand into vec_set<mode>_internal instead of UNSPEC_VSET_LANE.
 (neon_vset_lanedi): Rewrite to expand into emit_move_insn.
 (neon_vdup_n<mode>): Rewrite RTL without unspec.
 (neon_vdup_ndi): Rewrite as define_expand and use emit_move_insn.
 (neon_vdup_nv2di): Rewrite RTL without unspec and merge with
 with neon_vdup_lanev2di, adjusting the pattern from the latter
 to be predicable for consistency.
 (neon_vdup_lane<mode>_internal): New.
 (neon_vdup_lane<mode>): Turn into a define_expand and rewrite
 to avoid using an unspec.
 (neon_vdup_lanedi): Rewrite RTL pattern to avoid unspec.
 (neon_vdup_lanev2di): Turn into a define_expand.
 (neon_vcombine): Rewrite pattern to eliminate UNPSEC_VCOMBINE.
 (neon_vget_high<mode>): Replace with....
 (neon_vget_highv16qi): New pattern using canonical RTL.
 (neon_vget_highv8hi): Likewise.
 (neon_vget_highv4si): Likewise.
 (neon_vget_highv4sf): Likewise.
 (neon_vget_highv2di): Likewise.
 (neon_vget_low<mode>): Replace with....
 (neon_vget_lowv16qi): New pattern using canonical RTL.
 (neon_vget_lowv8hi): Likewise.
 (neon_vget_lowv4si): Likewise.
 (neon_vget_lowv4sf): Likewise.
 (neon_vget_lowv2di): Likewise.

 * config/arm/neon.ml (Vget_lane): Add No_op attribute to suppress
 test for this emitting vmov.
 (Vset_lane): Likewise.
 (Vdup_n): Likewise.
 (Vmov_n): Likewise.

 * doc/arm-neon-intrinsics.texi: Regenerated.

 gcc/testsuite/
 * gcc.target/arm/neon/vdup_ns64.c: Regenerated.
 * gcc.target/arm/neon/vdup_nu64.c: Regenerated.
 * gcc.target/arm/neon/vdupQ_ns64.c: Regenerated.
 * gcc.target/arm/neon/vdupQ_nu64.c: Regenerated.
 * gcc.target/arm/neon/vmov_ns64.c: Regenerated.
 * gcc.target/arm/neon/vmov_nu64.c: Regenerated.
 * gcc.target/arm/neon/vmovQ_ns64.c: Regenerated.
 * gcc.target/arm/neon/vmovQ_nu64.c: Regenerated.
 * gcc.target/arm/neon/vget_lanes64.c: Regenerated.
 * gcc.target/arm/neon/vget_laneu64.c: Regenerated.
 * gcc.target/arm/neon/vset_lanes64.c: Regenerated.
 * gcc.target/arm/neon/vset_laneu64.c: Regenerated.
 * gcc.target/arm/neon-vdup_ns64.c: New.
 * gcc.target/arm/neon-vdup_nu64.c: New.
 * gcc.target/arm/neon-vdupQ_ns64.c: New.
 * gcc.target/arm/neon-vdupQ_nu64.c: New.
 * gcc.target/arm/neon-vdupQ_lanes64.c: New.
 * gcc.target/arm/neon-vdupQ_laneu64.c: New.
 * gcc.target/arm/neon-vmov_ns64.c: New.
 * gcc.target/arm/neon-vmov_nu64.c: New.
 * gcc.target/arm/neon-vmovQ_ns64.c: New.
 * gcc.target/arm/neon-vmovQ_nu64.c: New.
 * gcc.target/arm/neon-vget_lanes64.c: New.
 * gcc.target/arm/neon-vget_laneu64.c: New.
 * gcc.target/arm/neon-vset_lanes64.c: New.
 * gcc.target/arm/neon-vset_laneu64.c: New.

 2010-07-02 Sandra Loosemore <email address hidden>
      Julian Brown <email address hidden>

 gcc/
 * config/arm/neon.md (UNSPEC_VABA): Delete.
 (UNSPEC_VABAL): Delete.
 (UNSPEC_VABS): Delete.
 (UNSPEC_VMUL_N): Delete.
 (adddi3_neon): New.
 (subdi3_neon): New.
 (mul<mode>3add<mode>_neon): Make the pattern named.
 (mul<mode>3neg<mode>add<mode>_neon): Likewise.
 (neon_vadd<mode>): Replace with define_expand, and move the remaining
 unspec parts...
 (neon_vadd<mode>_unspec): ...to this.
 (neon_vmla<mode>, neon_vmla<mode>_unspec): Likewise.
 (neon_vlms<mode>, neon_vmls<mode>_unspec): Likewise.
 (neon_vsub<mode>, neon_vsub<mode>_unspec): Likewise.
 (neon_vaba<mode>): Rewrite in terms of vabd.
 (neon_vabal<mode>): Rewrite in terms of vabdl.
 (neon_vabs<mode>): Rewrite without unspec.
 * config/arm/arm.md (*arm_adddi3): Disable for TARGET_NEON.
 (*arm_subdi3): Likewise.
 * config/arm/neon.ml (Vadd, Vsub): Split out 64-bit variants and add
 No_op attribute to disable assembly output checks.
 * config/arm/arm_neon.h: Regenerated.
 * doc/arm-neon-intrinsics.texi: Regenerated.

 gcc/testsuite/
 * gcc.target/arm/neon/vadds64.c: Regenerated.
 * gcc.target/arm/neon/vaddu64.c: Regenerated.
 * gcc.target/arm/neon/vsubs64.c: Regenerated.
 * gcc.target/arm/neon/vsubu64.c: Regenerated.
 * gcc.target/arm/neon-vmla-1.c: Add -ffast-math to options.
 * gcc.target/arm/neon-vmls-1.c: Likewise.
 * gcc.target/arm/neon-vsubs64.c: New execution test.
 * gcc.target/arm/neon-vsubu64.c: New execution test.
 * gcc.target/arm/neon-vadds64.c: New execution test.
 * gcc.target/arm/neon-vaddu64.c: New execution test.

2010-07-07 Sandra Loosemore <email address hidden>

 Merge from Sourcery G++ 4.4:

 2010-03-08 Paul Brook <email address hidden>

 gcc/
 * doc/invoke.texi: Document ARM -mcpu=cortex-m4.
 * config/arm/arm.c (all_architectures): Change v7e-m default to
 cortexm4.
 * config/arm/arm-cores.def: Add cortex-m4.
 * config/arm/arm-tune.md: Regenerate.

2010-07-07 Sandra Loosemore <email address hidden>

 Backport from mainline (originally from Sourcery G++ 4.4):

 2010-05-24 Daniel Jacobowitz <email address hidden>
      Sandra Loosemore <email address hidden>

 gcc/
 * config/arm/neon-testgen.ml: Use dg-add-options arm_neon.
 * doc/sourcebuild.texi (Effective-Target Keywords): Update arm_neon_ok
 description. Add arm_neon_fp16_ok.
 (Add Options): Add arm_neon and arm_neon_fp16.

 gcc/testsuite/
 * gcc.target/arm/neon/: Regenerated test cases.

 * gcc.target/arm/neon/polytypes.c,
 gcc.target/arm/neon-vmla-1.c, gcc.target/arm/neon-vmls-1.c,
 gcc.target/arm/neon-cond-1.c, gcc.target/arm/neon/vfp-shift-a2t2.c,
 gcc.target/arm/neon-thumb2-move.c, gcc.dg/torture/arm-fp16-ops-8.c,
 gcc.dg/torture/arm-fp16-ops-7.c, g++.dg/ext/arm-fp16/arm-fp16-ops-7.C,
 g++.dg/ext/arm-fp16/arm-fp16-ops-8.C, g++.dg/abi/mangle-neon.C: Use
 dg-add-options arm_neon.

 * gcc.target/arm/fp16-compile-vcvt.c, gcc.dg/torture/arm-fp16-ops-5.c,
 gcc.dg/torture/arm-fp16-ops-6.c, g++.dg/ext/arm-fp16/arm-fp16-ops-5.C,
 g++.dg/ext/arm-fp16/arm-fp16-ops-6.C: Use dg-add-options arm_neon_fp16
 and arm_neon_fp16_ok.

 * gcc.dg/vect/vect.exp, g++.dg/vect/vect.exp,
 gfortran.dg/vect/vect.exp: Use add_options_for_arm_neon.

 * lib/target-supports.exp (add_options_for_arm_neon): New.
 (check_effective_target_arm_neon_ok_nocache): New, from
 check_effective_target_arm_neon_ok. Check multiple possibilities.
 (check_effective_target_arm_neon_ok): Use
 check_effective_target_arm_neon_ok_nocache.
 (add_options_for_arm_neon_fp16)
 (check_effective_target_arm_neon_fp16_ok)
 check_effective_target_arm_neon_fp16_ok_nocache): New.
 (check_effective_target_arm_neon_hw): Use add_options_for_arm_neon.

2010-06-28 Julian Brown <email address hidden>

 Merge from Sourcery G++ 4.4:

 Daniel Jacobowitz <email address hidden>
 Joseph Myers <email address hidden>

 gcc/
 * doc/invoke.texi (-Wno-poison-system-directories): Document.
 * gcc.c (LINK_COMMAND_SPEC): Pass --no-poison-system-directories
 if -Wno-poison-system-directories and --error-poison-system-directories
 if -Werror=poison-system-directories to linker.
 * incpath.c: Include flags.h. Include toplev.h.
 (merge_include_chains): If ENABLE_POISON_SYSTEM_DIRECTORIES defined
 and flag_poison_system_directories is true, warn for use of
 /usr/include, /usr/local/include or /usr/X11R6/include.
 * Makefile.in (incpath.o): Depend on $(FLAGS_H) and toplev.h.
 * common.opt (--Wno-poison-system-directories): New.
 * configure.ac (--enable-poison-system-directories): New option.
 * configure: Regenerate.
 * config.in: Regenerate.

0 blueprints and 8 bugs targeted

Bug report Importance Assignee Status
604874 #604874 firefox fails to build from source with Linaro toolchain 3 High Ulrich Weigand  10 Fix Released
604874 #604874 firefox fails to build from source with Linaro toolchain 3 High Ulrich Weigand  10 Fix Released
616157 #616157 Merge 4.5.1 3 High Andrew Stubbs  10 Fix Released
616157 #616157 Merge 4.5.1 3 High Andrew Stubbs  10 Fix Released
612011 #612011 [arm] wrong instructions for dword move in some cases 4 Medium Yao Qi  10 Fix Released
612011 #612011 [arm] wrong instructions for dword move in some cases 4 Medium Yao Qi  10 Fix Released
602745 #602745 Add built-in defines for hard-float and soft-float ABIs 5 Low Chung-Lin Tang  10 Fix Released
602745 #602745 Add built-in defines for hard-float and soft-float ABIs 5 Low Chung-Lin Tang  10 Fix Released
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