linux-riscv 6.2.0-19.19.1+23.10.2 source package in Ubuntu

Changelog

linux-riscv (6.2.0-19.19.1+23.10.2) mantic; urgency=medium

  * Miscellaneous Ubuntu changes
    - [Config] Update configs

linux-riscv (6.2.0-19.19.1+23.10.1) mantic; urgency=medium

  * mantic/linux-riscv: 6.2.0-19.19.1+23.10.1 -proposed tracker (LP: #2023551)

  * Packaging resync (LP: #1786013)
    - [Packaging] resync git-ubuntu-log
    - [Packaging] resync getabis
    - [Packaging] update helper scripts
    - [Packaging] update update.conf

  * Enable Nezha board (LP: #1975592)
    - clk: sunxi-ng: fix ccu_mmc_timing.c kernel-doc issues
    - clk: sunxi-ng: Avoid computing the rate twice
    - clk: sunxi-ng: Remove duplicate ARCH_SUNXI dependencies
    - clk: sunxi-ng: Move SoC driver conditions to dependencies
    - clk: sunxi-ng: d1: Allow building for R528/T113
    - clk: sunxi-ng: d1: Mark cpux clock as critical
    - dt-bindings: clock: Add D1 CAN bus gates and resets
    - clk: sunxi-ng: d1: Add CAN bus gates and resets
    - soc: sunxi: sram: Only iterate over SRAM children
    - dt-bindings: power: Add Allwinner D1 PPU
    - soc: sunxi: Add Allwinner D1 PPU driver
    - soc: sunxi: select CONFIG_PM
    - dt-bindings: crypto: sun8i-ce: Add compatible for D1
    - crypto: sun8i-ce - Add TRNG clock to the D1 variant
    - dmaengine: sun6i: Set the maximum segment size
    - dt-bindings: vendor-prefixes: Add Allwinner D1/D1s board vendors
    - dt-bindings: riscv: Add Allwinner D1/D1s board compatibles
    - riscv: dts: allwinner: Add the D1/D1s SoC devicetree
    - riscv: dts: allwinner: Add MangoPi MQ devicetree
    - riscv: dts: allwinner: Add Allwinner D1 Nezha devicetree
    - riscv: dts: allwinner: Add Sipeed Lichee RV devicetrees
    - riscv: dts: allwinner: Add MangoPi MQ Pro devicetree
    - riscv: dts: allwinner: Add Dongshan Nezha STU devicetree
    - riscv: Add the Allwinner SoC family Kconfig option
    - riscv: dts: allwinner: d1: Add power controller node
    - nvmem: sunxi_sid: Drop the workaround on A64
    - dt-bindings: timer: Add bindings for the RISC-V timer device
    - clocksource/drivers/timer-riscv: Set CLOCK_EVT_FEAT_C3STOP based on DT
    - clocksource/drivers/riscv: Increase the clock source rating
    - clocksource/drivers/riscv: Get rid of clocksource_arch_init() callback
    - dt-bindings: timer: sifive,clint: add comaptibles for T-Head's C9xx
    - riscv: dts: allwinner: d1: Add crypto engine node
    - riscv: dts: nezha-d1: add gpio-line-names
    - SAUCE: mmc: sunxi-mmc: Correct the maximum segment size
    - SAUCE: riscv: dts: allwinner: d1: Add misc nodes
    - SAUCE: riscv: dts: allwinner: Keep aldo regulator on
    - SAUCE: riscv: dts: allwinner: Add button on the Nezha board
    - SAUCE: riscv: dts: allwinner: Add button on the Lichee RV Dock
    - SAUCE: dt-bindings: nvmem: Allow bit offsets greater than a byte
    - SAUCE: nvmem: core: Support reading cells with >= 8 bit offsets
    - SAUCE: regulator: dt-bindings: Add Allwinner D1 LDOs
    - SAUCE: regulator: sun20i: Add support for Allwinner D1 LDOs
    - SAUCE: dt-bindings: sram: sunxi-sram: Add optional regulators child
    - SAUCE: dt-bindings: thermal: sun8i: Add compatible for D1
    - SAUCE: thermal: sun8i: Document the unknown field
    - SAUCE: thermal: sun8i: Set the event type for new samples
    - SAUCE: thermal: sun8i: Use optional clock/reset getters
    - SAUCE: thermal: sun8i: Ensure vref is powered
    - SAUCE: thermal: sun8i: Add support for the D1 variant
    - SAUCE: riscv: dts: allwinner: d1: Add thermal sensor and zone
    - SAUCE: pwm: sun8i-v536: document device tree bindings
    - SAUCE: pwm: sunxi: Add Allwinner SoC PWM controller driver
    - SAUCE: pwm: sun8i-v536: Add support for the Allwinner D1
    - SAUCE: riscv: dts: allwinner: d1: Add PWM support
    - SAUCE: riscv: dts: allwinner: d1: Hook up PWM-controlled CPU voltage
      regulators
    - SAUCE: drm/sun4i: dsi: Allow panel attach before card registration
    - SAUCE: drm/sun4i: mixer: Remove unused CMA headers
    - SAUCE: drm/sun4i: decouple TCON_DCLK_DIV value from pll_mipi/dotclock ratio
    - SAUCE: drm/sun4i: tcon: Always protect the LCD dotclock rate
    - SAUCE: drm/sun4i: tcon_top: Register reset, clock gates in probe
    - SAUCE: riscv: dts: allwinner: lichee-rv-86-panel-480p: Add panel
    - SAUCE: riscv: dts: allwinner: d1: Add HDMI pipeline
    - SAUCE: riscv: dts: allwinner: d1: Enable HDMI on supported boards
    - SAUCE: dt-bindings: display: sun4i-tcon: Add external LVDS PHY
    - SAUCE: riscv: dts: allwinner: d1: Add LVDS0 PHY
    - SAUCE: dt-bindings: leds: Add Allwinner A100 LED controller
    - SAUCE: leds: sun50i-a100: New driver for the A100 LED controller
    - SAUCE: riscv: dts: allwinner: d1: Add LED controller node
    - SAUCE: riscv: dts: allwinner: d1: Add RGB LEDs to boards
    - SAUCE: ASoC: sun20i-codec: New driver for D1 internal codec
    - SAUCE: [WIP] ASoC: sun20i-codec: What is this ramp thing?
    - SAUCE: riscv: dts: allwinner: d1: Add sound cards to boards
    - SAUCE: dt-bindings: display: sun8i-a83t-dw-hdmi: Remove #phy-cells
    - SAUCE: dt-bindings: display: Add D1 HDMI compatibles
    - SAUCE: drm/sun4i: Add support for D1 HDMI
    - SAUCE: drm/sun4i: sun8i-hdmi-phy: Add support for D1 PHY
    - SAUCE: [HACK] drm/sun4i: Copy in BSP code for D1 HDMI PHY
    - SAUCE: dt-bindings: iommu: sun50i: Add compatible for Allwinner D1
    - SAUCE: iommu/sun50i: Support variants without an external reset
    - SAUCE: iommu/sun50i: Ensure bypass is disabled
    - SAUCE: iommu/sun50i: Add support for the D1 variant
    - SAUCE: iommu/sun50i: Ensure the IOMMU can be used for DMA
    - SAUCE: riscv: dts: allwinner: d1: Add IOMMU node
    - SAUCE: riscv: mm: Use IOMMU for DMA when available
    - SAUCE: dt-bindings: spi: sun6i: Add R329 variant
    - SAUCE: spi: spi-sun6i: Use a struct for quirks
    - SAUCE: spi: spi-sun6i: Add Allwinner R329 support
    - SAUCE: [WIP] spi: spi-sun6i: Dual/Quad RX Support
    - SAUCE: riscv: dts: allwinner: Add SPI support
    - SAUCE: dt-bindings: display: Add Sitronix ST7701s panel binding
    - SAUCE: drm/panel: Add driver for ST7701s DPI LCD panel
    - [Config] riscv: updateconfigs for Allwinner D1 support
    - [Config] riscv: Build in cpufreq-dt like other archs
    - [Config] riscv: Default to performance cpufreq governor

 -- Dimitri John Ledkov <email address hidden>  Tue, 13 Jun 2023 11:40:52 +0100